| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of operating at a high speed even in a state in which low voltage is input, and reducing power consumption without generating bleed current. <P>SOLUTION: A semiconductor memory device is provided with a first normal cell equipped with a first normal capacitor and a first normal MOS transistor; a second normal cell equipped with a second normal capacitor and a second normal MOS transistor; and a reference cell provided with a reference capacitor, a first reference MOS transistor (RT1), a second reference MOS transistor (RT2), and a MOS transistor for switch (RETF). The reference MOS transistor (TR1 and TR2) and the MOS transistor for switch (RETF) are arranged in the same pattern as the normal MOS transistor, and the reference capacitor is formed in the same pattern as the normal capacitor. Then, a cell array region is constituted. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
