SYSTEM AND METHOD FOR CACHE COHERENCY IN A CACHE WITH DIFFERENT CACHE LOCATION LENGTHS
摘要
A system and method for the design and operation of a cache system with differing cache location lengths in level one caches is disclosed. In one embodiment, each level one cache may include groups of cache locations of differing length, capable of holding portions of a level two cache line. A state tree may be created from data in a sharing vector. When a request arrives from a level one cache, the level two cache may examine the nodes of the state tree to determine whether the node of the state tree corresponding to the incoming request is already active. The results of this determination may be used to inhibit or permit the concurrent processing of the request.
申请公布号
WO2006072064(A2)
申请公布日期
2006.07.06
申请号
WO2005US47595
申请日期
2005.12.27
申请人
INTEL CORPORATION;CHEN, YEN-KUANG;HUGHES, CHRISTOPHER;TUCK III, JAMES
发明人
CHEN, YEN-KUANG;HUGHES, CHRISTOPHER;TUCK III, JAMES