发明名称 CROSS-TALK VERIFICATION DEVICE AND CROSS-TALK VERIFICATION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a cross-talk verification device and cross verification method for accurately searching a parasitic capacity being the factor of cross-talk, and for error-displaying a layout part where the parasitic capacity is generated at the time of operating the layout of a semiconductor integrated circuit. SOLUTION: This cross-talk verification device is provided with: a network designating means 107 for designating a network where a designer wants to analyze the influence of cross-talk; a parasitic capacity selecting means 108 for selecting a parasitic capacity having the network designated by the network designating means 107 as connection information at one side terminal from parasitic capacity information 105 obtained by integrating a parasitic capacity extracted from the layout pattern 101 into a database; a circuit generating means 109 for generating a circuit by adding the parasitic capacity selected by the parasitic capacity selecting means 108 to the circuit data one by one; a circuit simulator 111 for simulating the circuit obtained by the circuit generating means 109; and an error output means 112 for displaying the result. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006171818(A) 申请公布日期 2006.06.29
申请号 JP20040359263 申请日期 2004.12.13
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OKADA TAKEYA
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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