Sum-of-product calculating circuit and method thereof

摘要

An ADRC circuit (3) generates spatial classes with SD data extracted by an area extracting circuit (2). A moving class determining circuit (5) generates a moving class with SD data extracted by an area extracting circuit (4). A class address generating circuit (68) generates a class address with L bits. A decrease calculation circuit (69) reduces the number of bits of the address code from L to S bits. A prediction calculating circuit (67) receives coefficient data corresponding to the class address from a ROM table (70) and obtains HD data with the decreased SD data corresponding to a linear prediction equation. <IMAGE>