发明名称 CIRCUIT BOARD, PACKAGING STRUCTURE FOR SEMICONDUCTOR ELEMENT WITH BUMPS, AND ELECTRO-OPTICAL APPARATUS AND ELECTRONIC EQUIPMENT
摘要 PROBLEM TO BE SOLVED: To provide a circuit board, which reduces defective application of soldering material, so that shift in the mounting location of a semiconductor element with bumps is small, when the semiconductor element with bumps, such as BGA is packaged by solder reflow with respect to a substrate, such as an FPC, method of a semiconductor element with bumps, and electro-optical apparatus that uses such a circuit board, and electronic equipment. SOLUTION: With the circuit board, including a plurality of pads 413a for packaging a semiconductor element with bumps and a plurality of wirings 411 drawn out from each of the plurality of pads, a plurality of blocks 435 is arranged on the circuit board, which is provided with a plurality of pads. The plurality of blocks are configured, such that the pitch of longitudinal and horizontal pads are different from each other and have intervals between them. The plurality of wirings are drawn out from either of the longitudinal or horizontal of the plurality of pads in the block, having a broader pitch, or at least part of the plurality of wirings are drawn out from intervals. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006165591(A) 申请公布日期 2006.06.22
申请号 JP20060012713 申请日期 2006.01.20
申请人 SEIKO EPSON CORP 发明人 ASHIDA TAKESHI
分类号 H01L21/60;G02F1/1345;H01L23/12 主分类号 H01L21/60
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