发明名称 |
DISPLAY DEVICE AND DISPLAY METHOD |
摘要 |
PROBLEM TO BE SOLVED: To provide a display device and a display method that can prevent noise of delta-array pixels of an FRC method from being generated and image quality from decreasing. SOLUTION: The display device has a space/time modulation pattern generating circuit 14 which switches a time modulation pattern in 1F in synchronism with a horizontal drive clock HD supplied in every 1H and a vertical drive clock VD supplied in every 1F and also changes the application order in NF (N: an even number) to generate a space/time modulation pattern so as to enable driving wherein optimum VCOM does not deviate totally in (2N)F and a DC offset is canceled and an FRC data processing circuit 15 which generates a dot modulation signal pattern DMP based upon a modulation signal pattern S14 in synchronism with a master clock MCK and adds the dot modulation pattern to externally inputted digital image data DT to generate modulation data S15. COPYRIGHT: (C)2006,JPO&NCIPI
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申请公布号 |
JP2006163088(A) |
申请公布日期 |
2006.06.22 |
申请号 |
JP20040356066 |
申请日期 |
2004.12.08 |
申请人 |
SONY CORP |
发明人 |
YAMADA MOTOKI;NAKAJIMA YOSHIHARU;KIDA YOSHITOSHI |
分类号 |
G09G3/36;G02F1/133;G09G3/20 |
主分类号 |
G09G3/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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