| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for controlling a time point for data output by generating a plurality of control signals every 2tCK(s), when operation frequency of a synchronous memory device is high. SOLUTION: This method for controlling the time point for data output in the synchronous memory device varies a time point to generate an internal read command of the synchronous memory device, which is generated in response to an external read command according to the CAS latency of the synchronous memory device. The time point to generate the internal read command RD_COMMAND latency corresponds to 2N+2 (N=0, 1, 2,...) is delayed by 1tCK as compared with the time point to generate the internal read command RD_COMMAND when the CAS latency corresponds to 2N+1, where the 1tCK is a period of an applied external clock CLK. COPYRIGHT: (C)2006,JPO&NCIPI
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