| 摘要 |
<p>The cell has four transistors and resistors (R3, R5) formed in a semiconductor substrate. The transistors are formed in pairs in active regions (24, 26) of the substrate. A buried line (44), intended to form a high supply rail (Vdd), runs through a region (28) separating the active regions. The resistors are formed by capacitors with high leakages, where the capacitors are located at place where line crosses metallizations (M3, M5).</p> |
