发明名称 Improvements in or relating to d.c. pulse signal transmitting circuit arrangement
摘要 <p>1,140,059. Transistor circuits. SIEMENS A.G. 2 May, 1966 [30 April, 1965],No. 19160/66. Heading H3T. A D.C. pulse transmitting circuit for singlewire transmission in which a complementary pair of output transistors Ts6, Ts7, each connected between one of two supply terminals (of battery TB) and a common output terminal a, are controlled by separate signals produced by a complementary pair of driver transistors Ts3, Ts4 in such a manner that the bases of the output transistors e.g. Ts6, Ts7 are alternately connected to a potential mid-way between those of the two said supply terminals, under the control of a common control signal applied to both driver transistor bases. As shown, the input at a, b determines the state of bi-stable circuit Ts1, Ts2, and hence either transistor Ts3 and transistors Ts5, Ts6, conduct, connecting the positive terminal of the battery to output terminal a, or transistor Ts4 and transistors Ts7, Ts8 conduct, connecting the negative terminal to output a. Any number of transistors, including a single transistor (Fig. 1, not shown) may be included in each of the chains Ts5-Ts6 and Ts7-Ts8. Diodes D3-D6 assist the blocking of their respective transistors when those transistors are non- conductive. Capacitor C prevents both chains Ts5-Ts6 and Ts7-Ts8 conducting simultaneously during switch-over. Diode D1 prevents, when transistors Ts5, Ts6 are blocked, a current flowing from +TB, through the emitter-base of Ts5, base-collector of Ts6. Diode D2 performs the complimentary function to diode D1. A fuse, cut-out lamp or automatic cut-out switch Si protects the circuit against over-current.</p>
申请公布号 GB1140059(A) 申请公布日期 1969.01.15
申请号 GB19660019160 申请日期 1966.05.02
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人
分类号 G01N30/58;H04L25/24 主分类号 G01N30/58
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