发明名称 Controller arrangement with automatic power down
摘要 A control circuit is described in which a single input terminal receives digital control signals and analog control signals. In accordance with the principles of the invention, the control circuit includes an automatic power down circuit to place the control circuit into a low power draw or "sleep" mode whenever predetermined conditions are present. The automatic power down circuit monitors the single input terminal and when no demand for motor operation occurs for a predetermined period of time, the automatic power down circuit operates to place the control circuit into the low power draw mode.
申请公布号 US7064510(B2) 申请公布日期 2006.06.20
申请号 US20050080340 申请日期 2005.03.15
申请人 发明人
分类号 H01R39/46;H02K13/00;H02P25/12 主分类号 H01R39/46
代理机构 代理人
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