发明名称 Method and circuit for image-in-image overlay
摘要 The invention relates to a method and a circuit arrangement for picture-in-picture insertion, in which a sequence of insertion pictures (Kj=K1,K2, . . . ) is read, with vertical decimation (VD>=1), into a memory device (S) and subsequently read out, the sequence of insertion pictures (Kj) read out is inserted into a sequence of main pictures (Hi=H1, H2, . . . ) and the memory device (S) is continuously overwritten by the insertion pictures. In order to prevent the occurrence of a seam during the insertion of the insertion pictures into the main pictures in a cost-effective manner and with a relatively low outlay on apparatus, the memory device (S) is subdivided into memory segments (X,Y,Z) which are continuously cyclically overwritten by the insertion pictures, the memory device (S) has a storage capacity of less than two insertion pictures, and a decision is made as to whether the currently written insertion picture (Kj) or the immediately preceding insertion picture (Kj-1) is read out.
申请公布号 US7061543(B1) 申请公布日期 2006.06.13
申请号 US20010806003 申请日期 2001.06.15
申请人 MICRONAS GMBH 发明人 BRETT MAIK;MENDE MANFRED
分类号 H04N5/265;H04N5/272;G09G5/377;H04N5/45 主分类号 H04N5/265
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