| 摘要 |
An apparatus and method for scrambling/de-scrambling 16-bit data at a PCI Express protocol are provided. The apparatus includes an 8-bit precedence shift register generator for calculating an 8-bit shift register value, and outputting an 8-bit precedence shift register value through an exclusive OR (XOR) operation with 8-bit input data; and a 16-bit precedence shift register generator for more shifting the 8-bit precedence shift register value by 8 bits, assigning each register value, and outputting a 16-bit precedence shift register value through an exclusive OR (XOR) operation, whereby the 16-bit data is scrambled/de-scrambled at one clock. |
