| 摘要 |
PROBLEM TO BE SOLVED: To suppress deterioration of an access speed to a memory cell in a normal access mode in adding a forced access mode for a redundant cell test to a data line shift circuit in a semiconductor memory having a data line shift redundant circuit system. SOLUTION: A semiconductor storage device comprises the data line shift circuit 8 for connecting a plurality of data lines and spare data lines to a plurality of input-output data lines, a plurality input-output number attaching circuits 181 and 182 for allocating a shift instruction number that increases by one for each origin of a data line shift made by the data line shift circuit to each input-output data line as position information, a selection circuit 10 for storing a corresponding relationship of a defective column address to a shift instruction number and outputting a selection signal corresponding to the shift instruction number when the defective column address is inputted, a shift control circuit 9 for comparing the selection signal with the shift instruction number and outputting a shift control signal to the data line shift circuit according to a comparison result, and a number setting selection circuit 183 for selectively using a plurality of input-output number assignment circuits. COPYRIGHT: (C)2006,JPO&NCIPI
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