| 摘要 |
PROBLEM TO BE SOLVED: To suppress lowering in performance of memory access by suppressing generation of page miss penalty of a memory module with long latency. SOLUTION: A memory control circuit 201 holds latencies to accesses of a plurality of memory modules 202-205 and switches, at the time of controlling activation and deactivation of page in the memory modules 202-205, the control method of the activation and deactivation of page based on the latencies of the memory modules 202-205. COPYRIGHT: (C)2006,JPO&NCIPI
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