发明名称 MEMORY BUS CONVERSION DEVICE AND INFORMATION PROCESSING SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To mutually connect semiconductor memories differed in working speeds or access methods. <P>SOLUTION: An address conversion part 21 transmits an address signal SIG20 accepted from a bus 7 to a ROM 5, and a signal conversion part 20 converts a control signal SIG21 accepted from the bus 7 to a ROM-read signal SIG27 transmitted to the ROM 5. A storage part 22 temporarily holds data accepted from the ROM 5, and an output control part 23 reads data stored in the storage part 22 and outputs data based on a control protocol of an SDRAM 3. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006146390(A) 申请公布日期 2006.06.08
申请号 JP20040332796 申请日期 2004.11.17
申请人 OKI DATA CORP 发明人 URATA ICHIRO
分类号 G06F13/16;G06F12/04;G06F13/36 主分类号 G06F13/16
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