发明名称 CLOCK SYNCHRONIZING APPARATUS AND PROGRAM
摘要 <P>PROBLEM TO BE SOLVED: To provide a clock synchronizing apparatus capable of synchronizing video clocks between transmission and reception sides even in the case of video image transmission using a transmission path including many jitters such as an IP network so as to realize video transmission without causing a frame drop. <P>SOLUTION: The clock synchronizing apparatus is provided with a packet transmitter and a packet receiver interconnected via a communication circuit, the packet receiver includes: a reception buffer observation section for observing the consumed capacity of a reception buffer section; and a clock control section for obtaining a difference from an external clock on the basis of an operating state of the reception buffer section to determine a clock adjustment quantity and transmitting the clock adjustment quantity over a communication channel, and the packet transmitter includes: a control section for receiving the clock adjustment quantity from the communication channel to determine a control variable; a D/A conversion section for converting the control variable into an input control voltage; a VCXO section for generating a basic clock with a frequency determined by the input control voltage; and a clock generating section for generating a clock to be supplied to an external consecutive data output a plurality of on the basis of the basic clock generated by the VCXO section. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006148227(A) 申请公布日期 2006.06.08
申请号 JP20040331971 申请日期 2004.11.16
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 KAWANO TETSUO;SHIMIZU KENJI;OGURA TAKESHI;KIMIYAMA HIROYUKI;MARUYAMA MITSURU
分类号 H04L7/033 主分类号 H04L7/033
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