| 摘要 |
On an SiC single crystal substrate, an electric field relaxation layer and a p- type buffer layer are formed. The electric field relaxation layer is formed between the p- type buffer layer and the SiC single crystal substrate to contact SiC single crystal substrate. On the p- type buffer layer, an n type semiconductor layer is formed. On the n type semiconductor layer, a p type semiconductor layer is formed. In the p type semiconductor layer, an n+ type source region layer and an n+ type drain region layer are formed separated by a prescribed distance from each other. At a part of the region of p type semiconductor layer between the n+ type source region layer and the n+ type drain region layer, a p+ type gate region layer is formed.
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