| 摘要 |
Methods and apparatus for transmitting and receiving data in a memory interface are disclosed. The apparatus include a programmable transceiver having a variable duty cycle control, with the transceiver having at least one of a programmable variable duty cycle receiver and a programmable variable duty cycle transmitter. The receiver and the transmitter are both responsive to variable duty cycle control data and operate to vary a duty cycle of one of incoming and outgoing data. By providing programmability to the data duty cycle, the transceiver can optimally accommodate different memory device standards.
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