| 摘要 |
PROBLEM TO BE SOLVED: To provide a vertical MOS transistor in which a high frequency property is improved better than that of a conventional product and further the improvement of a yield is attained by reducing gate resistance. SOLUTION: When a gate voltage is applied to a gate electrode 9a, a channel is formed along a trench 4 in a body region 3, and an electron current is made to flow from a drain layer 1 to a source layer 7. At this time, a gate in the trench has a lamination structure of a polycrystalline silicon film 6 and a metal silicide 9. Consequently, the gate resistance is reduced and the high frequency property is improved. Further, since a recess formed at etching for gate formation is hard by formed, an operation failure and a reliability failure caused by on the recess are avoided. COPYRIGHT: (C)2006,JPO&NCIPI
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