发明名称 RATE-COMPATIBLE SHORTENED QUASI-CYCLIC LOW-DENSITY PARITY-CHECK (LDPC) CODES
摘要 <p>An embodiment of the present invention provides an apparatus, comprising a transceiver capable of encoding and decoding a unified quasi-cyclic low-density parity-check (QC-LDPC) code structure for variable code rates and sizes using a unified base matrix definition. QC-LDPC codes form a special class of structured LDPC codes whose parity check matrices comprise permutation or, shifted identity matrices. The unified base matrix definition may be a concatenation of multiple square matrices S&lt;SUB&gt;mxRm&lt;/SUB&gt; = (S&lt;SUP&gt;R&lt;/SUP&gt;</p>
申请公布号 WO2006057879(A1) 申请公布日期 2006.06.01
申请号 WO2005US41563 申请日期 2005.11.14
申请人 INTEL CORPORATION;XIA, BO 发明人 XIA, BO
分类号 H03M13/11 主分类号 H03M13/11
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