发明名称 |
Apparatus for random access memory array self-test |
摘要 |
An apparatus for the on-chip testing of random access memory arrays. In representative embodiments, embedded circuitry provides the ability to test random access memory arrays on-chip without requiring substantial area on the chip. The circuits are inherently located closer to the tested area which reduces propagation delay errors. These advantages have been obtained by locating the circuitry necessary to perform such test in the addressing and input/output blocks of the RAM.
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申请公布号 |
US7055075(B2) |
申请公布日期 |
2006.05.30 |
申请号 |
US20010008382 |
申请日期 |
2001.12.05 |
申请人 |
AVAGO TECHOLOGIES GENERAL IP PTE. LTD. |
发明人 |
KOSS LOUISE A.;NASH MARY LOUISE;BEUCLER DALE |
分类号 |
G11C29/00;G11C29/38 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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