发明名称 Method of fabricating a MOS structure with two conductive layers on the gate electrode
摘要 A gate electrode < 13 > is provided to fill up a trench < 300 > while covering its opening. Assuming that W<SUB>G </SUB>represents the diameter (sectional width) of a head portion of the gate electrode < 13 > located upward beyond a P-type base layer < 4 > and an N<SUP>+</SUP>-type emitter diffusion layer < 51 >, W<SUB>T </SUB>represents the diameter (sectional width) of an inner wall of a linearly extending portion of the trench < 300 > and W<SUB>C </SUB>represents the distance between the boundary (the inner wall of the trench 300 ) between a gate oxide film < 11 > and the P-type base layer < 4 > and an end surface of the gate electrode < 13 > located upward beyond the trench < 300 > in a section of the trench < 300 >, relation of either W<SUB>G</SUB>>=1.3.W<SUB>T </SUB>or W<SUB>C</SUB>>=0.2 mum holds between these dimensions.
申请公布号 US7052954(B2) 申请公布日期 2006.05.30
申请号 US20030650703 申请日期 2003.08.29
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分类号 H01L21/8242;H01L29/78;H01L21/26;H01L21/31;H01L21/331;H01L21/336;H01L21/469;H01L29/06;H01L29/08;H01L29/10;H01L29/423;H01L29/739 主分类号 H01L21/8242
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