Isochronous data transfer control method including packet configuration of thus-read isochronous header and data

摘要

A processing section reserves a number of transfers for an isochronous packet which includes isochronous data in an transfer number reservation register TNREG. A DMAC 1 reads that isochronous packet from SRAM, and the thus-read isochronous packet is transferred automatically to a BUS 1 (IEEE 1394 or USB) side at each isochronous transfer cycle until the number of transfers reserved in TNREG reaches zero. An SRAM header area is divided into page K and page L areas, and registers TNREGK and TNREGL are provided for reserving a number of transfers for each of the page K and L areas. During a special reproduction, a data pointer is used to select a TS packet which includes an I picture, for automatic transfer to the BUS 1 side.