发明名称 |
Methods of forming metal layers in integrated circuit devices using selective deposition on edges of recesses |
摘要 |
Methods of forming a metal layer in integrated circuit devices using selective electroplating in a recess are disclosed. In particular, a recess is formed in a surface of an insulating layer. The recess has a side wall inside the recess, a bottom inside the recess, and an edge at a boundary of the surface of the insulating layer and the side wall. A selective electroplating mask is formed on the side wall to provide a covered portion of the side wall and an exposed portion of the side wall. The exposed portion of the side wall can be electroplated with a metal. Related conductive contacts are also disclosed.
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申请公布号 |
US7051934(B2) |
申请公布日期 |
2006.05.30 |
申请号 |
US20040915563 |
申请日期 |
2004.08.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE HYO-JONG;CHOI SEUNG-MAN;KANG SANG-BUM;CHOI GIL-HEYUN |
分类号 |
G06K7/10;C25D5/02;H01L21/288;H01L21/768;H01L23/522;H01L23/532 |
主分类号 |
G06K7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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