| 摘要 |
Semiconductor integrated circuit that prevents breakdown and degradation of a gate oxide film caused by charge-up in manufacturing steps thereof is provided. The circuit includes a gate 12 provided insulated from a transistor diffusion layer 11, wirings 13 and 14 connected to the gate 12, a wiring 15 parallel to and adjacent to the wiring 13, and a wiring 16 connected to the wiring 15. The gate area of the gate 12 is indicated by G_Area, and the gate capacitance of the gate 12 is indicated by G_Cap. The areas of the wirings 13, 14, 15, and 16 are indicated by MG1_Area, MG2_Area, M1_Area, and M2_Area, respectively, and a parasitic capacitance between the wirings 13 and 15 is indicated by M1_Cap. An antenna ratio R1 calculated from the areas is given by an equation R1={(MG1_Area+MG2_Area)+alpha(M1_Area+M2_Area)}/G_Area. alpha is a parameter determined by a function of the G_Cap and the M1_Cap. Layout of the wirings is performed so that a relation R1<L1 (which is a specified value that causes damage to a gate oxide film). |
