发明名称 BONDING EQUIPMENT
摘要 <P>PROBLEM TO BE SOLVED: To raise teaching precision with no labor. <P>SOLUTION: A search area which simultaneously surrounds a plurality of chips with an acquired image and a chip area which surrounds a single chip are set (S1), a chip edge representing the contour of chip is extracted by edge recognition (S2), and then a chip size is calculated from the extracted chip edge. The inside of a range which is surrounded by the chip edge is stored in a memory as a template (S6), and the chip is collated by pattern matching which aligns the template with a chip position in the search area (S7) to calculate an X pitch and a Y pitch (S8). A wafer ring is started to move in the X direction with one chip as a reference position (S9), and the movement is continued until the other chip reaches the reference position (S10). At the completion of 1 pitch feeding, a feeding amount per 1 pitch is calculated based on the moving amount (S11). <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006128231(A) 申请公布日期 2006.05.18
申请号 JP20040311674 申请日期 2004.10.27
申请人 NIDEC TOSOK CORP 发明人 CHO KITSUTO
分类号 H01L21/52;H05K13/02;H05K13/04 主分类号 H01L21/52
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