| 发明名称 |
Method and apparatus for dynamic timing of memory interface signals |
| 摘要 |
A method and apparatus for using different timings to latch signals sent by two memory devices of identical design to compensate for differences in the lengths of conductors across which the signals must propagate.
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| 申请公布号 |
US7047384(B2) |
申请公布日期 |
2006.05.16 |
| 申请号 |
US20020185497 |
申请日期 |
2002.06.27 |
| 申请人 |
INTEL CORPORATION |
发明人 |
BODAS AMIT;BOGIN ZOHAR B.;FREKER DAVID E.;KAREENAHALLI SURYAPRASAD;RAMASWAMY SRIDHAR |
| 分类号 |
G06F1/12;G06F1/10;G06F12/00;G06F13/42 |
主分类号 |
G06F1/12 |
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