| 摘要 |
1,219,986. Semi-conductor devices. WESTERN ELECTRIC CO. Inc. 19 March, 1968 [27 March, 1967], No. 13203/68. Heading H1K. A mark 16, 17 of Si is provided over an insulating layer on a semi-conductor substrate 10, and at least a portion of the insulating layer exposed through the mask is etched away. Impurities are then diffused into the exposed substrate areas, using the Si mask 16, 17 as the diffusion mask, and into the Si mask itself. The embodiment comprises an I.G.F.E.T. formed in a p-type monocrystalline Si substrate 10 having a (111) upper face. Layers 13, 14, 15 respectively of SiO 2 , Si 3 N 4 and SiO 2 are formed conventionally over the entire substrate, and a channel is etched through the upper oxide layer 15 only using a photo-resist technique with ammonium bifluoride as the etchant. A polycrystalline layer 16 of Si is deposited over the surface of the layer 15 and in the etched channel, and a photo-resist etching technique is again used to remove part of the Si layer 16 at each edge of the channel while leaving a central strip 17 centrally disposed within the channel (see Fig. 2 (7), not shown). The exposed part of the SiO 2 layer 15 and the subsequently exposed portions of the layers 13, 14 are then etched away, and boron is diffused in to form p-type source and drain regions 11, 12. The layer 16 of Si is also etched to the desired shape. If the substrate-is p-type, an n-type diffusant such as phosphorus is used. Diffusion also occurs into the polycrystalline Si layer 16, 17 rendering it conductive to form source, drain and gate electrodes. The device may at this stage be annealed at 300‹ C., and finally layers 18-20 of Au or Al are applied to facilitate contact to the various electrodes. Alternative materials for the insulating layer or layers are aluminium oxide or nitride, beryllium oxide, or a mixture of these compounds. The invention may be applied to any type of device requiring an electrode/insulator/semi-conductor configuration, an example being a vidicon target comprising an array of photo-sensitive diodes passivated by an insulating layer which is covered with a conducting layer to dissipate charge in the insulation. |
