发明名称 METHOD OF MITIGATING VOIDS DURING SOLDER REFLOW
摘要 A Solder bump is formed by providing solder material on a conductive site of a substrate. The solder material is reflowed to provide a solder bump on the substrate. The solder material is ultrasonically agitated during at least a part of the reflow to at least partially mitigate formation of voids in the solder bump.
申请公布号 US2006091184(A1) 申请公布日期 2006.05.04
申请号 US20040975774 申请日期 2004.10.28
申请人 BAYOT ART;VALERIO RICHARD 发明人 BAYOT ART;VALERIO RICHARD
分类号 B23K1/06 主分类号 B23K1/06
代理机构 代理人
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