发明名称 Set-reset (S-R) latch based deglitch circuit
摘要 Methods and systems that use a simple hardware circuit and/or digital logic solution to identify and remove both positive and negative glitches from a signal. For this hardware circuit and/or digital logic solution, a glitch is referred to as an unwanted pulse with a width less than a specified duration, and is generally caused by noise or improper operation by other devices. A positive glitch occurs when the input signal has been logic low for some time, while a negative glitch occurs when the input signal has been logic high for some time. In one embodiment, the hardware circuit and/or digital logic solution removes noises from signals transmitted between a digital circuit and its switches and/or remote sensors, such as switches of keyboards and mice.
申请公布号 US2006082391(A1) 申请公布日期 2006.04.20
申请号 US20050252868 申请日期 2005.10.17
申请人 HSU DAVID;HULVEY ROBERT W 发明人 HSU DAVID;HULVEY ROBERT W.
分类号 G01R29/02 主分类号 G01R29/02
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