发明名称 Systems and methods for operating logic circuits
摘要 Systems and methods for reducing the power consumption of some combinations of logic gates by reducing the number of unnecessary transitions that are made by logic gates that do not affect the output of the logic. In one embodiment, a modified exclusive-OR (XOR) gate is coupled to a modified multiplexer. The XOR gate has two inputs, A<SUB>in </SUB>and B<SUB>in</SUB>, and an output, XOR<SUB>out</SUB>, which is provided as an input to the multiplexer. Another input to the multiplexer is C<SUB>in</SUB>. A select signal is input to the multiplexer to select either C<SUB>in </SUB>or XOR<SUB>out </SUB>to be provided at the output of the multiplexer. If XOR<SUB>out </SUB>is selected, the XOR gate operates in a first mode in which it functions as a normal XOR gate. If C<SUB>in </SUB>is selected, the XOR gate operates in a second mode in which the XOR gate uses less power than when the XOR gate operates normally.
申请公布号 US7030658(B2) 申请公布日期 2006.04.18
申请号 US20040764179 申请日期 2004.01.23
申请人 KABUSHIKI KAISHA TOSHIBA;IBM 发明人 MURAKAMI HIROAKI;TAKAHASHI OSAMU;QI JIEMING
分类号 G05B19/05;H03K19/20;H03K19/00;H03K19/173 主分类号 G05B19/05
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