| 摘要 |
A semiconductor device well balanced between high voltage applicability and low ON resistance, includes an n<SUP>+</SUP>-type semiconductor substrate; an n-type drift region formed thereon; a p-type base region formed on the n-type drift region; a plurality of p-type column regions in the n-type drift region so as to contact with the p-type base region and having a predetermined depth in a direction perpendicular to the p-type base region; a plurality of gate electrodes spaced by a regular distance from the centers, as viewed in the depth-wise direction, of each p-type column region, and penetrating the p-type base region, and partly buried in the n-type drift region; n-type source regions provided in the surficial region of the p-type base region around each of the gate electrodes; a drain electrode connected to the back surface of the n<SUP>+</SUP>-type semiconductor substrate; and a source electrode connected to the n-type source regions.
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