发明名称 SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can suppress a manufacturing cost by reducing the number of masks at the time of forming a high breakdown voltage MOS transistor and a low breakdown voltage MOS transistor, which have a different thickness for a gate oxide film, on one and the same substrate. SOLUTION: In the semiconductor device manufacturing method, a silicon oxide film 11 is deposited on top face of an epitaxial layer 5 in a region where the high breakdown voltage MOS transistor is to be formed. Thereafter, a silicon oxide film 12 having a thickness in compliance with the thickness of the gate oxide film of the low breakdown voltage MOS transistor is deposited on top face of the epitaxial layer 5. Then, the thickness of the silicon oxide film 12 on top face of the high breakdown voltage MOS transistor is adjusted by etching, and p-type diffusion layers 24 and 25 are formed by ion implantation. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006100579(A) 申请公布日期 2006.04.13
申请号 JP20040285024 申请日期 2004.09.29
申请人 SANYO ELECTRIC CO LTD 发明人 OGURA TAKASHI
分类号 H01L21/8234;H01L21/8238;H01L27/088;H01L27/092 主分类号 H01L21/8234
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