发明名称 Test method and test circuit for electronic device
摘要 A method of testing an electronic device including first and second semiconductor devices connected to each other with a plurality of bus lines. First, the first semiconductor device supplies a selected one of the bus lines with a first logical output signal. Then, the second semiconductor device acquires a first bus line signal from the selected bus line. The second semiconductor device inverts the first bus line signal to generate a second logical output signal. The second semiconductor device transmits the second logical output signal to the first semiconductor device. The first semiconductor device receives a second bus line signal from the selected bus line. The first semiconductor device compares the first logical output signal and the second bus line signal to detect a connection between the first semiconductor device and the second semiconductor device.
申请公布号 US7028235(B1) 申请公布日期 2006.04.11
申请号 US20000494953 申请日期 2000.02.01
申请人 FUJITSU LIMITED 发明人 KATO YOSHIHARU
分类号 G01R31/28;G11C29/02;G11C29/36 主分类号 G01R31/28
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