发明名称 VERBESSERTES VERFAHREN UND VORRICHTUNG ZUM SCHUTZ EINES VERSCHLÜSSELUNGSVERFAHRENS MIT ÖFFENTLICHEM SCHLÜSSEL GEGEN ANGRIFFE MIT ZEITMESSUNG UND FEHLEREINSPEISUNG
摘要 Improved methods and apparatus are provided for protecting public key schemes based on modular exponentiation (including RSA and Diffie-Hellman) from indirect cryptanalytic techniques such as timing and fault attacks. Known methods for making the implementation of number-theoretic schemes resistant to such attacks typically double their running time, whereas the novel methods and apparatus described in this patent add only negligible overhead. This improvement is particularly significant in smart card and software-based implementations, in which the modular exponentiation operation is quite slow, and doubling its time may be an unacceptable solution.
申请公布号 DE69828787(T2) 申请公布日期 2006.04.06
申请号 DE1998628787T 申请日期 1998.05.12
申请人 YEDA RESEARCH AND DEVELOPMENT CO., LTD. 发明人 SHAMIR, ADI
分类号 H04L9/30;G06F7/72 主分类号 H04L9/30
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