发明名称 SLEW RATE ADJUSTING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an output buffer circuit having a slew rate adjusting circuit which is not influenced by an external resistor. SOLUTION: Since the output of the circuit can be changed while controlling the potential of a pull-up resistor or pull-down resistor by applying a bias to the gate of an output transistor other than an output transistor changing at a constant slew rate to turn it on, out of a PMOS transistor 10 and an NMOS transistor 11 constituting output transistors of the slew rate adjusting circuit, the output can be changed from its an "H" level to an "L" level and from the "L" level to the "H" level at the constant slew rate, even if the pull-up resistor or the pull-down resistor is connected. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006086905(A) 申请公布日期 2006.03.30
申请号 JP20040270612 申请日期 2004.09.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KIHARA HIDEYUKI
分类号 H03K19/0175;H03K5/12 主分类号 H03K19/0175
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