| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of clock cycles in bus connection and to reduce the number of hardware in a bus connection circuit for connecting buses having different bit widths. SOLUTION: The bus connection circuit connects control command lines of buses 1, 2 which are connected with bus master units 4, 5, 8, 9 and bus slave units 6, 7, 10, 11 through control command lines and data lines and have different bit widths through a common control command bus to control the buses 1, 2 with common command information, connects data lines of buses 1, 2 through a data conversion unit 3 to convert the bit width of each data line. An arbitration circuit 12 arbitrating the bus right of the buses 1, 2 according to an arbitration request from the bus master units and the bus slave units is provided for acquiring the bus right from a bus of a transfer source in data transfer between the buses to execute write access and read access between the buses 1, 2. COPYRIGHT: (C)2006,JPO&NCIPI
|
