发明名称 Integrated circuit capable of mapping logical block address data across multiple domains
摘要 A method according to one embodiment may include discovering at least one data block comprising logical block address information. The method may also include mapping logical block address information from a first domain into a second domain. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
申请公布号 US2006064568(A1) 申请公布日期 2006.03.23
申请号 US20040945755 申请日期 2004.09.21
申请人 SETO PAK-LUNG;MASSUCCI MARTIN M 发明人 SETO PAK-LUNG;MASSUCCI MARTIN M.
分类号 G06F12/08 主分类号 G06F12/08
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