发明名称 Wafer scale integration packaging and method of making and using the same
摘要 A method of making a microelectronic device comprising: making a device B comprising providing a structure having a first bond pad, depositing a first electrically conductive material having a first reflow temperature over the first bond pad, and depositing a second electrically conductive material having a second reflow temperature over the first electrically conductive material, and wherein the second reflow temperature is less than the first reflow temperature, and heating the device to a temperature sufficient to reflow the second electrically conductive material but not the first electrically conductive material so that the second electrically conductive material encapsulates the first electrically conductive material to provide a first bump for making electrical connection to device B.
申请公布号 US2006063311(A1) 申请公布日期 2006.03.23
申请号 US20040946149 申请日期 2004.09.20
申请人 APTOS CORPORATION. 发明人 HO CHI-SHEN;LIN CHANG-MING
分类号 H01L21/50 主分类号 H01L21/50
代理机构 代理人
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