发明名称 |
SRAM cell with stacked thin-film transistors |
摘要 |
An integrated circuit memory device according to the invention includes a first column (412) of memory cells (4121) electrically coupled to a first pair of bit lines and a bit line precharge and selection circuit (414,416) which includes a stacked arrangement of a PMIS and a NMOS transistor (N41). These transistors may be thin-film transistors and may include a first PMOS thin-film pull-up transistor and a first NMOS thin-film pass transistor. These transistors are electrically coupled to one of the first pair of bit lines (PBL). The first column of memory cells may include a column of TFT SRAM cells. |
申请公布号 |
EP1638142(A2) |
申请公布日期 |
2006.03.22 |
申请号 |
EP20050019824 |
申请日期 |
2005.09.13 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SUH, YOUNG-HO;BYUN, HYUN-GEUN |
分类号 |
G11C7/12;G11C11/412;G11C11/417;H01L21/8244;H01L27/11 |
主分类号 |
G11C7/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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