| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve resistance characteristics against a shock while the deterioration of the shearing strength of a semiconductor device is suppressed. <P>SOLUTION: A semiconductor chip 14 is mounted on a carrier substrate 11 in which a conductive pattern 12c is formed. A half slit 19 is formed on the connecting surface of a land 12a formed on the rear surface of the carrier substrate 11. A projecting electrode 18 is connected to the land 12a. The projecting electrode 18 is connected to a land 2 formed on a mother board 1. Thereby, the carrier substrate 11 is mounted on the mother board 1. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
