| 摘要 |
PROBLEM TO BE SOLVED: To provide an I/O degeneration circuit capable of reducing a chip area. SOLUTION: The I/O degeneration circuit 10 including the memory chip 3 of a multichip package writes a write data signal DT given through a data I/O terminal TA0 from the outside in the memory cells MC0 to MC3 of another memory chip 5 when another memory chip 5 is selected during a writing operation in a test mode, and outputs a signal indicating the coincidence of the logical level of the read data signal of the memories MC0 to MC3 of another memory chip 5 to the data I/O terminal TA0 during a read-out operation. Thus, as the I/O degeneration circuit 10 is disposed in common to a plurality of chips, a chip area is small. COPYRIGHT: (C)2006,JPO&NCIPI
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