| 摘要 |
<p>A dual phase pulse modulation (DPPM) decoder circuit (Fig. 3) processes a DPPM signal, which is in the form (Fig. 28) of a series of high and low pulses whose pulse widths represent successive groups (e.g., 00, 01, 10, 11) of M data bits, so as to recover data carried by the signal. Each of the 2<sup</p> |
