| 摘要 |
A frequency synthesizer comprises a digital/analog converter which sequentially converts difference data of phase data indicating the phase of a reference signal to an analog value, a voltage signal generator which integrates the analog value converted by the digital/analog converter, thereby generating a voltage signal interpolating between signal levels corresponding to two time-sequential pieces of the phase data, a reference-timing-signal output section which outputs a reference timing signal indicating the specific phase of the reference signal at a timing when the signal level of the voltage signal generated by the voltage signal generator crosses a preset setting voltage, and a reset section which resets the voltage signal generated by the voltage signal generator to the setting voltage. Accordingly, the noise performance of an output signal from the frequency synthesizer is improved.
|
