| 摘要 |
The invention is to provide a mute circuit (30) capable of surely muting various noises generated in a signal output line (L, R) with a simple circuit configuration and a signal output device (2) provided with the same. A resistor (R1, R2) and a capacitor (C1, C2) are serially connected to each other on the signal output line (L, R) of an analog signal outputted from a D/A converter (40), and a predetermined voltage (Vc) is impressed thereon. The voltage (Vc) is set to a level which is higher than a reference voltage (V0) to be supplied to the signal output line (L, R). In cases where noises are generated on the signal output line (L, R) owing to variation of a voltage having an inverted polarity relative to the reference voltage (V0), the variation is offset by the discharge of the capacitor (C1, C2) while in cases where the noises are generated owing to the variation of a voltage having the same polarity, a resistance of the resistor (R1, R2) is set to absorb the voltage variation. |
