发明名称 |
ADJUSTABLE CLOCK DRIVER CIRCUIT |
摘要 |
<p>A circuit for generating a clock signal to driver a plurality of memory components in a memory subsystem. The clock driver circuit comprises a clock generator for transmitting a clock signal to drive the plurality of memory components, a memory controller for controlling the plurality of memory components, and an adjustable impedance circuit residing within said memory controller such that the adjustable impedance circuit is programmable in accordance with a control input generated by the memory controller. The clock generator is configured to generate a clock signal with a voltage swing controlled by the impedance of the adjustable impedance circuit.</p> |
申请公布号 |
EP1634295(A1) |
申请公布日期 |
2006.03.15 |
申请号 |
EP20040754748 |
申请日期 |
2004.06.03 |
申请人 |
RAMBUS INC. |
发明人 |
BEST, SCOTT, C.;LAMBRECHT, FRANK |
分类号 |
G06F13/16;G11C7/22;(IPC1-7):G11C7/22 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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