| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory apparatus in which internal data transfer can be performed surely and high speed performance is realized. <P>SOLUTION: This semiconductor memory apparatus has a memory cell array in which nonvolatile memory cells being electrically rewritable are arranged, a sense amplifier circuit connected to the memory cell array, a data transfer circuit constituted between the sense amplifier circuit and a data input/output port, a control signal generating circuit generating a plurality of control signals performing input/output of data of the sense amplifier circuit and timing control of data transfer of the data transfer circuit, and an internal clock signal generating circuit generating an internal clock signal having the same period as the reference clock signal and having a fixed duty ratio which does not depend on the duty ratio based on the reference clock signal, and being reference of the plurality of control signals. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
