<p>The present invention is an electronic circuit that significantly enhances timing margin in high-speed, digital memory modules. The circuit is implemented is applicable to all switching waveforms on both control and data signal lines that drive the memory bus. Implementation of the present invention also provides a significant reduction in power dissipation compared to memory modules of comparable size and speed utilizing the present art.</p>
申请公布号
WO2006026171(A2)
申请公布日期
2006.03.09
申请号
WO2005US29328
申请日期
2005.08.17
申请人
THUNDER CREATIVE TECHNOLOGIES, INC.;WASHBURN, ROBERT, D.;MCCLANAHAN, ROBERT, F.