| 摘要 |
A micro-electronic package structure and a method for fabricating the same are proposed. A carrier is prepared and provided with a cavity for receiving at least one semiconductor chip having a plurality of electrical connection contacts. A dielectric layer is formed on the carrier, with the electrical connection contacts being exposed from the dielectric layer. A first circuit layer is formed on the dielectric layer and electrically connected to a portion of the electrical connection contacts of the chip. Another dielectric layer is formed on the first circuit layer and said dielectric layer, and a second circuit layer is formed on this dielectric layer and electrically connected to the rest of the electrical connection contacts of the chip and the first circuit layer by conductive vias, such that the chip is integrated into the carrier.
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