| 摘要 |
Embodiments of the invention are directed to an exposure method for preventing wafer breakage, particularly of a trench-type power MOS device. In one embodiment, the exposure method includes: (a) providing a substrate; (b) forming a trench area and a non-trench area on the substrate; (c) carrying the substrate on a hot plate, the hot plate having a plurality of supporters corresponding to the non-trench area; and (d) performing photoresist coating and baking procedures to the substrate. The exposure method of the present invention can prevent wafer breakage due to rapid temperature variation so as to increase the yield and the efficiency of the manufacturing process and reduce the cost.
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